Chipone Adopts EasylogicECO as Metal ECO Solution
Head of Digital Design Dept., Chipone Technology
With the implementation of EasyECO design flow, Chipone is able to reduce its average product design cycle by 3 weeks, and to undertake complicated metal ECOs that manual work cannot achieve.
Chipone is the largest supplier of panel driver ICs and total display solutions in China. We aim to become one of the world-leading suppliers in the display sector. (http://www.chiponeic.com/en)
To cope with the fierce competition in the panel driver IC sector, we can't help focusing on metal ECOs to avoid Re-Data In situations, as we often need to complete new projects within only a few weeks from start to tape-out. Apparently, manual ECOs cannot help us meet such tight schedule.
Application Stage in Design Flow
The frequent product modifications drive us to deploy many metal ECO tasks. We adopted EasyECO’s post-mask design flow to reduce the number of re-spin projects.
In the past, we often gave up the metal ECO tasks if the required patch size exceeded 10 spare cells since the netlist was so hard to trace. With the EasyECO flow, we now benefit from EasyECO’s finding the best ECO points precisely, and its generating the smallest-possible patches. The success rate of our metal ECO tasks increases quite a bit.